ATtiny1624/1626/1627

OUTCLR

Output Value Clear

  0x06 8 - 0x00    

Output Value Clear

Bit  7 6 5 4 3 2 1 0  
  OUTCLR[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 7:0 – OUTCLR[7:0]: Output Value Clear

Output Value Clear

This bit field controls the output driver level for each PORTx pin, without using a read-modify-write operation.

Writing a ‘0’ to bit n in this bit field has no effect.

Writing a ‘1’ to bit n in this bit field will clear the corresponding bit in PORTx.OUT, which will configure the output for pin n (Pxn) to be driven low.

Reading this bit field will return the value of PORTx.OUT.