ATtiny1624/1626/1627

CTRLB

Control B

The CRCSCAN.CTRLB register contains the mode and source settings for the CRC. It is not writable when the CRC is busy, or when an NMI has been triggered.

  0x01 8 - 0x00    

Control B

Bit  7 6 5 4 3 2 1 0  
      MODE[1:0]     SRC[1:0]  
Access      R/W R/W     R/W R/W  
Reset      0 0     0 0  

Bits 5:4 – MODE[1:0]: CRC Flash Access Mode

CRC Flash Access Mode

The CRC can be enabled during internal Reset initialization to verify Flash sections before letting the CPU start (see the device data sheet fuse description). If the CRC is enabled during internal Reset initialization, the MODE bit field will read out non-zero when normal code execution starts. To ensure proper operation of the CRC under code execution, write the MODE bit to 0x0 again.

ValueNameDescription
0x0 PRIORITY The CRC module runs a single check with priority to Flash. The CPU is halted until the CRC completes.
other - Reserved

Bits 1:0 – SRC[1:0]: CRC Source

CRC Source

The SRC bit field selects which section of the Flash the CRC module will check. To set up section sizes, refer to the fuse description.

The CRC can be enabled during internal Reset initialization to verify Flash sections before letting the CPU start (see the Fuses chapter). If the CRC is enabled during internal Reset initialization, the SRC bit field will read out as FLASH, BOOTAPP, or BOOT when normal code execution starts (depending on the configuration).

ValueNameDescription
0x0 FLASH The CRC is performed on the entire Flash (boot, application code, and application data sections).
0x1 BOOTAPP The CRC is performed on the boot and application code sections of Flash.
0x2 BOOT The CRC is performed on the boot section of Flash.
0x3 - Reserved.