ATtiny1624/1626/1627

MADDR

Host Address

  0x07 8 - 0x00    

Host Address

Bit  7 6 5 4 3 2 1 0  
  ADDR[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 7:0 – ADDR[7:0]: Address

Address

This register contains the address of the external client device. When this bit field is written, the TWI will issue a Start condition, and the shift register performs a byte transmit operation on the bus depending on the bus state.

This register can be read at any time without interfering with the ongoing bus activity since a read access does not trigger the host logic to perform any bus protocol related operations.

The host control logic uses the bit 0 of this register as the R/W direction bit.