ATtiny1624/1626/1627

HCNT

High Byte Timer Counter Register - Split Mode

The TCAn.HCNT register contains the counter value for the high byte timer. CPU and UPDI write access has priority over count, clear or reload of the counter.

  0x21 8 - 0x00    

High Byte Timer Counter Register - Split Mode

Bit  7 6 5 4 3 2 1 0  
  HCNT[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 7:0 – HCNT[7:0]: Counter Value for High Byte Timer

Counter Value for High Byte Timer

This bit field defines the counter value in high byte timer.