ATtiny1624/1626/1627

STATUS

Status

  0x06 8 - 0x00    

Status

Bit  7 6 5 4 3 2 1 0  
                ADCBUSY  
Access                R  
Reset                0  

Bit 0 – ADCBUSY: ADC Busy

ADC Busy

This bit is cleared when an ADC conversion is complete, and settling times related to configuration changes are finished.

This bit is set when the ADC is doing a conversion or waiting for settling times related to configuration changes.