ATtiny1624/1626/1627

MCLKCTRLA

Main Clock Control A

  0x00 8 Configuration Change Protection 0x00    

Main Clock Control A

Bit  7 6 5 4 3 2 1 0  
  CLKOUT           CLKSEL[1:0]  
Access  R/W           R/W R/W  
Reset  0           0 0  

Bit 7 – CLKOUT: System Clock Out

System Clock Out

When this bit is written to ‘1’, the system clock is output to the CLKOUT pin.

When the device is in a Sleep mode, there is no clock output unless a peripheral is using the system clock.

Bits 1:0 – CLKSEL[1:0]: Clock Select

Clock Select

This bit field selects the source for the Main Clock (CLK_MAIN).

ValueNameDescription
0x0 OSC20M 20 MHz internal oscillator
0x1 OSCULP32K 32.768 kHz internal ultra low-power oscillator
0x2 XOSC32K 32.768 kHz external crystal oscillator
0x3 EXTCLK External clock