Control C - Normal Mode

This register description is valid for all modes except the Host SPI mode. When the USART Communication Mode (CMODE) bit field in this register is written to ‘MSPI’, see CTRLC - Host SPI mode for the correct description.

  0x07 8 - 0x03    

Control C - Normal Mode

Bit  7 6 5 4 3 2 1 0  
  CMODE[1:0] PMODE[1:0] SBMODE CHSIZE[2:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 1 1  

Bits 2:0 – CHSIZE[2:0]: Character Size

Character Size

This bit field selects the number of data bits in a frame. The receiver and transmitter use the same setting. For 9BIT character size, the order of which byte to read or write first, low or high byte of RXDATA or TXDATA, can be configured.
0x00 5BIT 5-bit
0x01 6BIT 6-bit
0x02 7BIT 7-bit
0x03 8BIT 8-bit
0x04 - Reserved
0x05 - Reserved
0x06 9BITL 9-bit (Low byte first)
0x07 9BITH 9-bit (High byte first)

Bit 3 – SBMODE: Stop Bit Mode

Stop Bit Mode

This bit selects the number of Stop bits to be inserted by the transmitter.

The receiver ignores this setting.

0 1 Stop bit
1 2 Stop bits

Bits 5:4 – PMODE[1:0]: Parity Mode

Parity Mode

This bit field enables and selects the type of parity generation. See Parity for more information.

0x0 DISABLED Disabled
0x1 - Reserved
0x2 EVEN Enabled, even parity
0x3 ODD Enabled, odd parity

Bits 7:6 – CMODE[1:0]: USART Communication Mode

USART Communication Mode

This bit field selects the communication mode of the USART.

Writing a 0x03 to these bits alters the available bit fields in this register. See CTRLC - Host SPI mode.

0x00 ASYNCHRONOUS Asynchronous USART
0x01 SYNCHRONOUS Synchronous USART
0x02 IRCOM Infrared Communication
0x03 MSPI Host SPI