ATtiny1624/1626/1627

PERBUF

Period Buffer Register

This register serves as the buffer for the Period (TCAn.PER) register. Writing to this register from the CPU or UPDI will set the Period Buffer Valid (PERBV) bit in the TCAn.CTRLF register.

The TCAn.PERBUFL and TCAn.PERBUFH register pair represents the 16-bit value, TCAn.PERBUF. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.

  0x36 16 - 0xFFFF    

Period Buffer Register

Bit  15 14 13 12 11 10 9 8  
  PERBUF[15:8]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  7 6 5 4 3 2 1 0  
  PERBUF[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  

Bits 15:8 – PERBUF[15:8]: Period Buffer High Byte

Period Buffer High Byte

This bit field holds the MSB of the 16-bit Period Buffer register.

Bits 7:0 – PERBUF[7:0]: Period Buffer Low Byte

Period Buffer Low Byte

This bit field holds the LSB of the 16-bit Period Buffer register.