Debug Control
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DBGRUN | |||||||
Access | R/W | ||||||
Reset | 0 |
Run in Debug Mode
This bit controls whether the ADC will continue operation or not when in Debug mode and the CPU is halted.
Value | Description |
---|---|
0 | The ADC will not continue operating in Debug mode when the CPU is halted. An ongoing conversion or burst accumulation will finish before the ADC stops. |
1 | The ADC will continue operating in Debug mode when the CPU is halted |