ATtiny1624/1626/1627

CTRLB

Control B

  0x06 8 - 0x00    

Control B

Bit  7 6 5 4 3 2 1 0  
  RXEN TXEN   SFDEN ODME RXMODE[1:0] MPCM  
Access  R/W R/W   R/W R/W R/W R/W R/W  
Reset  0 0   0 0 0 0 0  

Bit 0 – MPCM: Multi-Processor Communication Mode

Multi-Processor Communication Mode

This bit controls whether the Multi-Processor Communication mode is enabled or not. Refer to Multiprocessor Communication for more information.

ValueDescription
0 Multi-Processor Communication mode is disabled
1 Multi-Processor Communication mode is enabled

Bits 2:1 – RXMODE[1:0]: Receiver Mode

Receiver Mode

Writing this bit field selects the receiver mode of the USART.

ValueNameDescription
0x00 NORMAL Normal-Speed mode
0x01 CLK2X Double-Speed mode
0x02 GENAUTO Generic Auto-Baud mode
0x03 LINAUTO LIN Constrained Auto-Baud mode

Bit 3 – ODME: Open Drain Mode Enable

Open Drain Mode Enable

This bit controls whether Open Drain mode is enabled or not. See the One-Wire Mode section for more information.
ValueDescription
0 Open Drain mode is disabled
1 Open Drain mode is enabled

Bit 4 – SFDEN: Start-of-Frame Detection Enable

Start-of-Frame Detection Enable

This bit controls whether the USART Start-of-Frame Detection mode is enabled or not. Refer to Start-of-Frame Detection for more information.
ValueDescription
0 The USART Start-of-Frame Detection mode is disabled
1 The USART Start-of-Frame Detection mode is enabled

Bit 6 – TXEN: Transmitter Enable

Transmitter Enable

This bit controls whether the USART transmitter is enabled or not. Refer to Disabling the Transmitter for more information.
ValueDescription
0 The USART transmitter is disabled
1 The USART transmitter is enabled

Bit 7 – RXEN: Receiver Enable

Receiver Enable

This bit controls whether the USART receiver is enabled or not. Refer to Disabling the Receiver for more information.
ValueDescription
0 The USART receiver is disabled
1 The USART receiver is enabled