ATtiny1624/1626/1627
Register Summary
Offset
Name
Bit Pos.
7
6
5
4
3
2
1
0
0x00
...
0x03
Reserved
0x04
CCP
7:0
CCP[7:0]
0x05
...
0x0C
Reserved
0x0D
SP
7:0
SP[7:0]
15:8
SP[15:8]
0x0F
SREG
7:0
I
T
H
S
V
N
Z
C
Parent topic:
AVR CPU