PPS Inputs

Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below).

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS register.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Table 1. PPS Input Selection Table
Peripheral	PPS Input Register	Default Pin Selection at POR	Register Reset Value at POR	Available Input Port
Peripheral	PPS Input Register	Default Pin Selection at POR	Register Reset Value at POR	28-Pin Devices
External Interrupt	INTPPS	RB0	`‘b001 000`	A	B	—
Timer0 Clock	T0CKIPPS	RA4	`‘b000 100`	A	B	—
Timer1 Clock	T1CKIPPS	RC0	`‘b010 000`	A	—	C
Timer1 Gate	T1GPPS	RB5	`‘b001 101`	—	B	C
Timer2 Input	T2INPPS	RC3	`‘b010 011`	A	—	C
CCP1	CCP1PPS	RC2	`‘b010 010`	—	B	C
CCP2	CCP2PPS	RC1	`‘b010 001`	—	B	C
SCL1/SCK1	SSP1CLKPPS⁽¹⁾	RC3	`‘b010 011`	—	B	C
SDA1/SDI1	SSP1DATPPS⁽¹⁾	RC4	`‘b010 100`	—	B	C
SS1	SSP1SSPPS	RA5	`‘b000 101`	A	—	C
RX1/DT1	RX1PPS	RC7	`‘b010 111`	—	B	C
CK1	CK1PPS	RC6	`‘b010 110`	—	B	C
ADC Conversion Trigger	ADACTPPS	RB4	`‘b001 100`	—	B	C

Note:

1.Bidirectional pin. The corresponding output must select the same pin.