Register Summary - Timer2
Offset |
Name |
Bit Pos. |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
0x00
...
0x028B
|
Reserved |
|
|
|
|
|
|
|
|
|
0x028C |
T2TMR |
7:0 |
T2TMR[7:0] |
0x028D |
T2PR |
7:0 |
T2PR[7:0] |
0x028E |
T2CON |
7:0 |
ON |
CKPS[2:0] |
OUTPS[3:0] |
0x028F |
T2HLT |
7:0 |
PSYNC |
CPOL |
CSYNC |
MODE[4:0] |
0x0290 |
T2CLKCON |
7:0 |
|
|
|
|
|
CS[2:0] |
0x0291 |
T2RST |
7:0 |
|
|
|
|
RSEL[3:0] |