Interrupts

The ADC module allows for the ability to generate an interrupt upon completion of an analog-to-digital conversion. The ADC Interrupt Flag (ADIF) bit is set upon the completion of each conversion. If the ADC Interrupt Enable (ADIE) bit is set, an ADC interrupt event occurs. The ADIF bit must be cleared by software.

Important:
  1. 1.The ADIF bit is set at the completion of every conversion, regardless of whether or not the ADC Interrupt is enabled.
  2. 2.The ADC operates in Sleep only when the ADCRC oscillator is selected as the clock source.

The ADC Interrupt can be generated while the device is operating or while in Sleep. While the device is operating in Sleep mode: