Setting the AHEN
bit enables additional clock stretching and interrupt generation after the eighth falling
edge of a received matching address. Once a matching address has been clocked in, CKP is
cleared and the SSPxIF interrupt is set.
Figure 1
displays a standard waveform of a 7-bit address client transmission with AHEN enabled.
- 1.Bus starts Idle.
- 2.Host sends Start condition; the S
bit is set; SSPxIF is set if SCIE is set.
- 3.Host sends matching address with the WR/ bit set. After the eighth falling edge of the
SCL line the CKP bit is cleared and SSPxIF interrupt is generated.
- 4.Client software clears SSPxIF.
- 5.Client software reads the ACKTIM, R/W and AD/ bits to determine the source of the
interrupt.
- 6.Client reads the address value from the SSPxBUF
register, clearing the BF
bit.
- 7.Client software decides from this information if it wishes to
ACK or NACK and sets the ACKDT bit accordingly.
- 8.Client software sets the CKP bit, releasing SCL.
- 9.Host clocks in the ACK value from the client.
- 10.Client hardware automatically clears the CKP bit and sets SSPxIF
after ACK if the
R/W bit is set.
- 11.Client software clears SSPxIF.
- 12.Client loads value to transmit to the host into SSPxBUF, setting
the BF bit.
Important: SSPxBUF cannot be loaded until
after the ACK.
- 13.Client software sets the CKP bit, releasing the clock.
- 14.Host clocks out the data from the client and sends an
ACK value on the ninth SCL
pulse.
- 15.Client hardware copies the ACK value into the ACKSTAT bit.
- 16.Steps 10-15 are repeated for each byte transmitted to the host
from the client.
- 17.If the host sends a not ACK, the client releases the bus allowing the host to send a Stop and
end the communication.
Important: Host must send a not
ACK on the last byte to ensure
that the client releases the SCL line to receive a Stop.
Figure 1. I2C
Client, 7-Bit Address, Transmission (AHEN = 1
)