Peripheral Address Map

The address map shows the base address for each peripheral. For a complete register description and summary for each peripheral, refer to the respective peripheral sections.

Table 1. Peripheral Address Map
Base Address Name Description 14-Pin 20-Pin
0x0000 VPORTA Virtual Port A X X
0x0008 VPORTC Virtual Port C X X
0x000C VPORTD Virtual Port D X X
0x0014 VPORTF Virtual Port F X X
0x001C GPR General Purpose Registers X X
0x0030 CPU CPU X X
0x0040 RSTCTRL Reset Controller X X
0x0050 SLPCTRL Sleep Controller X X
0x0060 CLKCTRL Clock Controller X X
0x00A0 BOD Brown-Out Reset Detector X X
0x00B0 VREF Voltage Reference X X
0x00C0 MVIO MVIO Controller X X
0x0100 WDT Watchdog Timer X X
0x0110 CPUINT Interrupt Controller X X
0x0120 CRCSCAN Cyclic Redundancy Check Memory Scan X X
0x0140 RTC Real-Time Counter X X
0x01C0 CCL Configurable Custom Logic X X
0x0200 EVSYS Event System X X
0x0400 PORTA Port A Configuration X X
0x0440 PORTC Port C Configuration X X
0x0460 PORTD Port D Configuration X X
0x04A0 PORTF Port F Configuration X X
0x05E0 PORTMUX Port Multiplexer X X
0x0600 ADC0 Analog-to-Digital Converter 0 X X
0x0680 AC0 Analog Comparator 0 X X
0x06A0 DAC0 Digital-to-Analog Converter 0 X X
0x06D8 ZCD3 Zero Cross Detector 3 X X
0x0800 USART0 Universal Synchronous Asynchronous Receiver Transmitter 0 X X
0x0820 USART1 Universal Synchronous Asynchronous Receiver Transmitter 1 X X
0x0900 TWI0 Two-Wire Interface 0 X X
0x0940 SPI0 Serial Peripheral Interface 0 X X
0x0A00 TCA0 Timer/Counter Type A instance 0 X X
0x0B00 TCB0 Timer/Counter Type B instance 0 X X
0x0B10 TCB1 Timer/Counter Type B instance 1 X X
0x0B80 TCD0 Timer/Counter Type D instance 0 X X
0x0F00 SYSCFG System Configuration X X
0x1000 NVMCTRL Nonvolatile Memory Controller X X
Table 2. System Memory Address Map
Base Address Name Description 14-Pin 20-Pin
0x1040 LOCK Lock bits X X
0x1050 FUSE User configuration fuses X X
0x1080 USERROW User row X X
0x1100 SIGROW Signature row X X
Parent topic: Peripherals and Architecture