Control A

Name:
CTRLA
Offset:
0x00
Reset:
0x00
Access:
-
Bit76543210
SDASETUPSDAHOLD[1:0]FMPEN
AccessR/WR/WR/WR/W
Reset0000

Bit 4 – SDASETUP: SDA Setup Time

SDA Setup Time

This bit controls the number of cycles the SCL is stretched to ensure sufficient setup time on the SDA out signal. This bit is used when operating in client mode.

ValueNameDescription
0 4CYC SDA setup time is four clock cycles
1 8CYC SDA setup time is eight clock cycles

Bits 3:2 – SDAHOLD[1:0]: SDA Hold Time

SDA Hold Time

This bit field selects the SDA hold time for the TWI. See the Electrical Characteristics section for details.

ValueNameDescription
0x0 OFF Hold time OFF
0x1 50NS Short hold time
0x2 300NS Meets the SMBus 2.0 specifications under typical conditions
0x3 500NS Meets the SMBus 2.0 across all corners

Bit 1 – FMPEN: Fast-mode Plus Enable

Fast-mode Plus Enable

Writing a ‘1’ to this bit selects the 1 MHz bus speed for the TWI in default configuration or the TWI host in Dual mode configuration.

ValueNameDescription
0 OFF Operating in Standard mode or Fast mode
1 ON Operating in Fast mode Plus