The Design Tree window displays the design hierarchy from the top level. By default, when the Netlist Viewer opens, it displays the Design Tree window.
- Nets (<integer>) — number in brackets is the total number of nets at the top level.
- Ports (<integer>) — number in brackets is the total number of ports at the top level.
- Design components under the top
level — each component can be collapsed or expanded to expose.
- Nets — total number of nets at the component level.
- Ports — total number of ports at the component level.
- Subcomponents inside the component.
- Fanout Values (Nets) — when two numbers are displayed in the bracket, the first number is the fanout of the net at the local level (of hierarchy) and the second number is the fanout of the net at the global level. As an example, net_xyz (fanout: 1,3) means the net goes down the levels of hierarchy to three different pins (global fanout 3) and is not connected to any other pins at the current level (local fanout 1).
- Primitives — primitives refer to macros and low-level design objects and can appear in the top level or component level.
The design tree is different with different netlist views. For the Flat Post-Compile view, the design tree displays a much larger number of nets than the RTL view or Hierarchical Post-Synthesis view, because the netlist is flattened in the Post-Compile view and all nets are counted. The nets in the Flat Post-Compile view, unlike the RTL view or the Hierarchical Post-Synthesis view, shows only one value for fanout (global fanout) because it is a flattened view (no hierarchy).
For nets that are part of a NetBundle, the NetBundle name is followed by a number in parentheses that indicates the total number of nets in the NetBundle.
