MCUCR – MCU Control Register
The MCU Control Register contains control bits for power management.
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SE | SMn[2:0] | ||||||
Access | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 |
Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s purpose, it is recommended to set the Sleep Enable (SE) bit just before the execution of the SLEEP instruction.
Sleep Mode n Select Bits [n=2:0]
These bits select between the five available sleep modes as shown in the table.
SM2 | SM1 | SM0 | Sleep Mode |
---|---|---|---|
0 | 0 | 0 | Idle |
0 | 0 | 1 | ADC Noise Reduction |
0 | 1 | 0 | Power-down |
0 | 1 | 1 | Power-save |
1 | 0 | 0 | Reserved |
1 | 0 | 1 | Reserved |
1 | 1 | 0 | Standby(1) |