8-bit AVR Microcontroller

DC Characteristics

Table 1. TA = -40°C to 85°C, VCC = 2.7V to 5.5V (unless otherwise noted)
Symbol Parameter Condition Min Typ Max Units
VIL Input Low Voltage except XTAL1 and RESET pins VCC = 2.7V - 5.5V -0.5   0.2 VCC(1) V
VIH Input High Voltage except XTAL1 and RESET pins VCC = 2.7V - 5.5V 0.6 VCC(2)   VCC + 0.5 V
VIL1 Input Low Voltage

XTAL1 pin

VCC = 2.7V - 5.5V -0.5   0.1 VCC(1) V
VIH1 Input High Voltage

XTAL 1 pin

VCC = 2.7V - 5.5V 0.8 VCC(2)   VCC + 0.5 V
VIL2 Input Low Voltage

RESET pin

VCC = 2.7V - 5.5V -0.5   0.2 VCC V
VIH2 Input High Voltage

RESET pin

VCC = 2.7V - 5.5V 0.9 VCC(2)   VCC + 0.5 V
VIL3 Input Low Voltage

RESET pin as I/O

VCC = 2.7V - 5.5V -0.5   0.2 VCC V
VIH3 Input High Voltage

RESET pin as I/O

VCC = 2.7V - 5.5V 0.6 VCC(2)

0.7 VCC(2)

  VCC + 0.5 V
VOL Output Low Voltage(3)
(Ports B,C,D) IOL = 20mA, VCC = 5V
IOL = 10mA, VCC = 3V     0.9
0.6 V
V
VOH Output High Voltage(4)
(Ports B,C,D) IOH = -20mA, VCC = 5V
IOH = -10mA, VCC = 3V 4.2
2.2     V
V
IIL Input Leakage
Current I/O Pin VCC = 5.5V, pin low
(absolute value)     1 μA
IIH Input Leakage
Current I/O Pin VCC = 5.5V, pin high
(absolute value)     1 μA
RRST Reset Pull-up Resistor   30   80
Rpu I/O Pin Pull-up Resistor   20   50
ICC Power Supply Current Active 4MHz, VCC = 3V   2 5 mA
Active 8MHz, VCC = 5V   6 15 mA
Idle 4MHz, VCC = 3V   0.5 2 mA
Idle 8MHz, VCC = 5V   2.2 7 mA
Power-down mode(5) WDT enabled, VCC = 3V   <10 28 μA
WDT disabled, VCC = 3V   <1 3 μA
VACIO Analog Comparator 
Input Offset Voltage VCC = 5V
 Vin = VCC/2     40 mV
IACLK Analog Comparator 
Input Leakage Current VCC = 5V
 Vin = VCC/2 -50   50 nA
tACPD Analog Comparator 
Propagation Delay VCC = 2.7V 
VCC = 5.0V   750
500   ns
Note:

1. “Max” means the highest value where the pin is guaranteed to be read as low

2. “Min” means the lowest value where the pin is guaranteed to be read as high

3. Although each I/O port can sink more than the test conditions (20mA at VCC = 5V, 10mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed:
PDIP, TQFP, and QFN/MLF Package:
1] The sum of all IOL, for all ports, should not exceed 300mA.
2] The sum of all IOL, for ports C0 - C5 should not exceed 100mA.
3] The sum of all IOL, for ports B0 - B7, C6, D0 - D7 and XTAL2, should not exceed 200mA.
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condition.

4. Although each I/O port can source more than the test conditions (20mA at VCC = 5V, 10mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed:
PDIP, TQFP, and QFN/MLF Package:
1] The sum of all IOH, for all ports, should not exceed 300mA.
2] The sum of all IOH, for port C0 - C5, should not exceed 100mA.
3] The sum of all IOH, for ports B0 - B7, C6, D0 - D7 and XTAL2, should not exceed 200mA.
If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current greater than the listed test condition.

5. Minimum VCC for Power-down is 2.5V.