SFIOR

8-bit AVR Microcontroller

SFIOR – Special Function IO Register

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.

Name:: SFIOR
Offset:: 0x30
Reset:: 0
Access:: When addressing I/O Registers as data space the offset address is 0x50

Bit7	6	5	4	3	2	1	0
					PUD
Access					R/W
Reset					0

Bit 2 – PUD: Pull-up Disable

Pull-up Disable

When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See Configuring the Pin for more details about this feature.