The PCIE LTSSM State page is available in Debug TRANSCEIVER when PCIE has been instantiated in a design.
The PCIE LTSSM State page shows the PCIE Design Hierarchy. It contains the tree hierarchy of the PCIE instance in the design, as shown in the following figure. The physical location of the PCIE instance is shown beside the PCIE instance in second column.
Figure 1. PCIE Design Hierarchy
