Appendix B

This section provides information about the device IDs and pinout descriptions.

Table 1. Programming Pin Locations by Package Type
Device Package Package Code VDD VSS MCLR ICSPCLK ICSPDAT
PIN PIN PIN PORT PIN PORT PIN PORT

PIC18F04Q41
PIC18F05Q41
PIC18F06Q41

14-Pin SOIC SL 1 14 4 RA3 12 RA1 13 RA0
14-Pin TSSOP ST 1 14 4 RA3 12 RA1 13 RA0

PIC18F14Q41
PIC18F15Q41
PIC18F16Q41

20-Pin PDIP P 1 20 4 RA3 18 RA1 19 RA0
20-Pin SOIC SO 1 20 4 RA3 18 RA1 19 RA0
20-Pin SSOP SS 1 20 4 RA3 18 RA1 19 RA0
20-Pin VQFN REB 18 17 1 RA3 15 RA1 16 RA0
Note:

The most current package drawings are located in the Microchip Packaging Specification, DS00000049 (http://www.microchip.com/packaging). The drawing numbers listed above do not include the current revision designator, which is added at the end of the number.