CONFIG3
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BOREN[1:0] | LPBOREN | IVT1WAY | MVECEN | PWRTS[1:0] | MCLRE | ||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Brown-out Reset Enable
Value | Description |
---|---|
11 | Brown-out Reset enabled, the SBOREN bit is ignored |
10 | Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored |
01 | Brown-out Reset enabled according to SBOREN |
00 | Brown-out Reset disabled |
Low-Power BOR Enable
Value | Description |
---|---|
1 | Low-Power Brown-out Reset is disabled |
0 | Low-Power Brown-out Reset is enabled |
IVTLOCK One-Way Set Enable
Value | Description |
---|---|
1 | The IVTLOCK bit can be cleared and set only once; IVT registers remain locked after one clear/set cycle |
0 | The IVTLOCK bit can be set and cleared repeatedly (subject to the unlock sequence) |
Multivector Enable
Value | Description |
---|---|
1 | Multivector is enabled; vector table used for interrupts |
0 | Legacy interrupt behavior |
Power-up Timer Selection
Value | Description |
---|---|
11 | PWRT is disabled |
10 | PWRT is set at 64 ms |
01 | PWRT is set at 16 ms |
00 | PWRT is set at 1 ms |
Master Clear (MCLR) Enable
Value | Name | Description |
---|---|---|
x | If LVP =
1 |
RA3 pin function is MCLR |
1 | If LVP =
0 |
RA3 pin function is MCLR |
0 | If LVP =
0 |
RA3 pin function is a port-defined function |