CONFIG4
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
XINST | LVP | STVREN | PPS1WAY | ZCD | BORV[1:0] | ||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset1 | 1 | 1 | 1 | 1 | 1 | 1 |
Extended Instruction Set Enable
Value | Description |
---|---|
1 | Extended Instruction Set and Indexed Addressing mode disabled (Legacy mode) |
0 | Extended Instruction Set and Indexed Addressing mode enabled |
Low-Voltage Programming Enable
Value | Description |
---|---|
1 | Low-Voltage Programming enabled. MCLR/VPP pin function is MCLR. The MCLRE Configuration bit is ignored. |
0 | HV on MCLR/VPP must be used for programming |
Stack Overflow/Underflow Reset Enable
Value | Description |
---|---|
1 | Stack Overflow or Underflow will cause a Reset |
0 | Stack Overflow or Underflow will not cause a Reset |
PPSLOCKED One-Way Set Enable
Value | Description |
---|---|
1 | The PPSLOCKED bit can only be set once after an unlocking sequence is executed; once PPSLOCK is set, all future changes to PPS registers are prevented |
0 | The PPSLOCKED bit can be set and cleared as needed (unlocking sequence is required) |
ZCD Disable
Value | Description |
---|---|
1 | ZCD disabled, ZCD can be enabled by setting the ZCDSEN bit of ZCDCON |
0 | ZCD always enabled, PMDx[ZCDMD] bit is ignored |
Brown-out Reset Voltage Selection(1)
Value | Description |
---|---|
11 | Brown-out Reset Voltage (VBOR) set to 1.90V |
10 | Brown-out Reset Voltage (VBOR) set to 2.45V |
01 | Brown-out Reset Voltage (VBOR) set to 2.7V |
00 | Brown-out Reset Voltage (VBOR) set to 2.85V |