USART Module

ATtiny102/104 features a dedicated USART module with individual configuration registers. Refer to the Register Description section under the USART module in the ATtiny102/104 device datasheet for detailed description of these registers. They also have a separate TX, RX, and XCK pins, refer to the section I/O Multiplexing in the ATtiny102/104 device datasheet for details on the pin mapping for this peripheral. This USART module supports Asynchronous as well as Synchronous operation. It also supports serial frames with 5, 6, 7, 8, or 9 data bits and 1 or 2 stop bits.

The Universal Synchronous and Asynchronous Serial Receiver and Transmitter (USART) can be set to a master SPI compliant mode of operation by configuring the UMSELn1:0 bits in UCSR0C register, these bits select the mode of operation of the USART0.