Serial Memory to AVR Hardware Connection

The SPI interface is configured in the Master mode. The SCK and MOSI ports are outputs and the MISO port is an input. Refer to Figure 1.

Figure 1. Hardware Connections

Note that in this application note the Slave Select signal #SS is used to control the chip enable pin #CE of the serial memory.

The #HOLD signal can be held high in its inactive state because the SPI interface always halts the clock if the data is not valid.

The user can choose the configuration of the write protect signal #WP.