An interrupt can be generated for every rising or falling edge of the comparator output.
When either edge detector is triggered and its associated enable bit is set (INTP and/or INTN bits), the Corresponding Interrupt Flag bit (CxIF bit of the respective PIR register) will be set.
To enable the interrupt, the following bits must be set:
The associated interrupt flag bit, CxIF bit of the respective PIR register, must be cleared in software to successfully detect another edge.