LATx
Output Latch Register
Important:
- Writes to LATx are equivalent to
writes to the corresponding PORTx register. Reads from LATx register return
register values, not I/O pin values.
- Refer to the “Pin Allocation
Table” for details about pin availability per port
- Unimplemented bits will read back
as ‘
0
’
- Name:
- LATx
- Address:
- Reset:
- Access:
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LATx7 | LATx6 | LATx5 | LATx4 | LATx3 | LATx2 | LATx1 | LATx0 |
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Resetx | x | x | x | x | x | x | x |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – LATxn: Output Latch Value