CLCnGLS1
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| G2D4T | G2D4N | G2D3T | G2D3N | G2D2T | G2D2N | G2D1T | G2D1N |
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Resetx | x | x | x | x | x | x | x |
dyT: Gate2 Data ‘y’ True (noninverted)
| Value | Description |
|---|---|
| 1 | dyT is gated into g2 |
| 0 | dyT is not gated into g2 |
dyN: Gate2 Data ‘y’ Negated (inverted)
| Value | Description |
|---|---|
| 1 | dyN is gated into g2 |
| 0 | dyN is not gated into g2 |