These steps need to be followed when setting up the CLC:
- 1.Disable the CLC
by clearing the EN bit.
- 2.Select the
desired inputs using the CLCnSEL0 through CLCnSEL3
registers.
- 3.Clear any ANSEL
bits associated with CLC input pins.
- 4.Set all TRIS bits
associated with inputs. However, a CLC input will also operate if the pin is
configured as an output, in which case the TRIS bits must be cleared.
- 5.Enable the chosen
inputs through the four gates using the CLCnGLS0 through CLCnGLS3 registers.
- 6.Select the gate
output polarities with the GyPOL bits.
- 7.Select the
desired logic function with the MODE bits.
- 8.Select the
desired polarity of the logic output with the POL bit (this step may be combined with the previous gate output
polarity step).
- 9.If driving a
device pin, configure the associated pin PPS control register and also clear the
TRIS bit corresponding to that output.
- 10.Configure the
interrupts (optional). See the CLC Interrupts section.
- 11.Enable the CLC by
setting the EN bit.