The SAM L21 Xplained
Pro headers EXT1, EXT2, and
EXT3 offers access to the I/O of the microcontroller in order to expand the board e.g.,
by connecting extensions to the board. These headers are based on the standard extension
header specified in Table 1. The headers have a pitch of 2.54mm.
Table 1. Extension Header EXT1
EXT1 pin |
SAM
L21 pin |
Function |
Shared functionality |
1 [ID] |
- |
- |
Communication line to the ID chip on an extension
board |
2 [GND] |
- |
- |
Ground |
3 [ADC(+)] |
PB05 |
AIN[13] |
|
4 [ADC(-)] |
PA03 |
AIN[1] |
|
5 [GPIO1] |
PB06 |
GPIO |
|
6 [GPIO2] |
PB07 |
GPIO |
|
7 [PWM(+)] |
PA12 |
TCC2/WO[0] |
|
8 [PWM(-)] |
PA13 |
TCC2/WO[1] |
|
9 [IRQ/GPIO] |
PB04 |
IRQ4/GPIO |
|
10 [SPI_SS_B/GPIO] |
PA02 |
GPIO |
SW0 |
11 [TWI_SDA] |
PA08 |
SERCOM2 PAD[0] I²C SDA |
EXT2, EXT3, and EDBG I²C |
12 [TWI_SCL] |
PA09 |
SERCOM2 PAD[1] I²C SCL |
EXT2, EXT3, and EDBG I²C |
13 [USART_RX] |
PB09 |
SERCOM4 PAD[1] UART RX |
|
14 [USART_TX] |
PB08 |
SERCOM4 PAD[0] UART TX |
|
15 [SPI_SS_A] |
PA05 |
SERCOM0 PAD[1] SPI SS |
|
16 [SPI_MOSI] |
PA06 |
SERCOM0 PAD[2] SPI MOSI |
|
17 [SPI_MISO] |
PA04 |
SERCOM0 PAD[0] SPI MISO |
|
18 [SPI_SCK] |
PA07 |
SERCOM0 PAD[3] SPI SCK |
|
19 [GND] |
- |
- |
Ground |
20 [VCC] |
- |
- |
Power for extension board |
Table 2. Extension Header EXT2
EXT2 pin |
SAM
L21 pin |
Function |
Shared functionality |
1 [ID] |
- |
- |
Communication line to the ID chip on an extension
board |
2 [GND] |
- |
- |
Ground |
3 [ADC(+)] |
PA10 |
AIN[18] / PTC_Y8 |
Onboard QTouch Button 1 |
4 [ADC(-)] |
PA11 |
AIN[19] |
|
5 [GPIO1] |
PA20 |
GPIO |
EDBG GPIO2 |
6 [GPIO2] |
PA21 |
GPIO |
EDBG GPIO3 |
7 [PWM(+)] |
PB12 |
TC4/WO[0] |
|
8 [PWM(-)] |
PB13 |
TC4/WO[1] |
|
9 [IRQ/GPIO] |
PB14 |
IRQ14/GPIO |
|
10 [SPI_SS_B/GPIO] |
PB15 |
GPIO |
|
11 [TWI_SDA] |
PA08 |
SERCOM2 PAD[0] I²C SDA |
EXT1, EXT3, and EDBG I²C |
12 [TWI_SCL] |
PA09 |
SERCOM2 PAD[1] I²C SCL |
EXT1, EXT3, and EDBG I²C |
13 [USART_RX] |
PA19 |
SERCOM1 PAD[3] UART RX |
EXT3 UART |
14 [USART_TX] |
PA18 |
SERCOM1 PAD[2] UART TX |
EXT3 UART |
15 [SPI_SS_A] |
PA17 |
GPIO |
|
16 [SPI_MOSI] |
PB22 |
SERCOM5 PAD[2] SPI MOSI |
EXT3 and EDBG SPI |
17 [SPI_MISO] |
PB16 |
SERCOM5 PAD[0] SPI MISO |
EXT3 and EDBG SPI |
18 [SPI_SCK] |
PB23 |
SERCOM5 PAD[3] SPI SCK |
EXT3 and EDBG SPI |
19 [GND] |
- |
- |
Ground |
20 [VCC] |
- |
- |
Power for extension board |
Table 3. Extension Header EXT3
EXT3 pin |
SAM
L21 pin |
Function |
Shared functionality |
1 [ID] |
- |
- |
Communication line to the ID chip on an extension
board |
2 [GND] |
- |
- |
Ground |
3 [ADC(+)] |
PB00 |
AIN[8] |
|
4 [ADC(-)] |
PB01 |
AIN[9] |
EDBG GPIO0 |
5 [GPIO1] |
PB30 |
GPIO |
|
6 [GPIO2] |
PA15 |
GPIO |
|
7 [PWM(+)] |
PB10 |
TCC0/WO[4] |
LED0 |
8 [PWM(-)] |
PB11 |
TCC0/WO[5] |
|
9 [IRQ/GPIO] |
PA16 |
IRQ0/GPIO |
EDBG GPIO1 |
10 [SPI_SS_B/GPIO] |
PA27 |
GPIO |
|
11 [TWI_SDA] |
PA08 |
SERCOM2 PAD[0] I²C SDA |
EXT1, EXT2, and EDBG I²C |
12 [TWI_SCL] |
PA09 |
SERCOM2 PAD[1] I²C SCL |
EXT1, EXT2, and EDBG I²C |
13 [USART_RX] |
PA19 |
SERCOM1 PAD[3] UART RX |
EXT2 UART |
14 [USART_TX] |
PA18 |
SERCOM1 PAD[2] UART TX |
EXT2 UART |
15 [SPI_SS_A] |
PB17 |
SERCOM5 PAD[1] SPI SS |
|
16 [SPI_MOSI] |
PB22 |
SERCOM5 PAD[2] SPI MOSI |
EXT2 and EDBG SPI |
17 [SPI_MISO] |
PB16 |
SERCOM5 PAD[0] SPI MISO |
EXT2 and EDBG SPI |
18 [SPI_SCK] |
PB23 |
SERCOM5 PAD[3] SPI SCK |
EXT2 and EDBG SPI |
19 [GND] |
- |
- |
Ground |
20 [VCC] |
- |
- |
Power for extension board |