The CCL must be configured to the desired logical functionality. The
configure_ccl_lut0()
function initializes the CCL module with the
desired clock generator and configures LUT0 according to the following settings:
- Input 0 is default TC
- Input 1 is alternative TC
- Input 2 is masked
- Truth table value set to
0x01
- Run in Standby enabled
In addition, the encoded signal is multiplexed to the I/O pin corresponding to CCL0
output. The configuration function follows the ASF standard by creating a configuration
struct, loading default settings, applying necessary changes, and enabling the
module.
void configure_ccl_lut0(void)
{
struct ccl_config conf;
ccl_get_config_defaults(&conf);
conf.clock_source = GCLK_GENERATOR_1;
conf.run_in_standby = true;
ccl_init(&conf);
struct ccl_lut_config conf_ccl_lut0;
ccl_lut_get_config_defaults(&conf_ccl_lut0);
conf_ccl_lut0.truth_table_value = 0x01;
conf_ccl_lut0.input0_src_sel = CCL_LUT_INPUT_SRC_TC;
conf_ccl_lut0.input1_src_sel = CCL_LUT_INPUT_SRC_ALTTC;
conf_ccl_lut0.input2_src_sel = CCL_LUT_INPUT_SRC_MASK;
struct system_pinmux_config lut0_out_pin_conf;
system_pinmux_get_config_defaults(&lut0_out_pin_conf);
lut0_out_pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
lut0_out_pin_conf.mux_position = CCL_OUTPUT_MUX;
system_pinmux_pin_set_config(CCL_OUTPUT_PIN, &lut0_out_pin_conf);
ccl_lut_set_config(CCL_LUT_0, &conf_ccl_lut0);
ccl_lut_enable(CCL_LUT_0);
ccl_module_enable();
}