Interrupt Response Time

The interrupt execution response for all the enabled AVR interrupts is four/five clock cycle’s minimum. This four/five clock cycles depends on the program counter width. If the program counter width is not more than two bytes, then the interrupt response time will be four clock cycles minimum and if the program counter width is more than two bytes, then the interrupt response time will be minimum five clock cycles.

These four/five clock cycles include:

Two/Three cycles for pushing the Program Counter (PC) value into the stack
One cycle for updating the stack pointer
One cycle for clearing the Global interrupt enable (I) bit

If an interrupt occurs when the MCU is in sleep mode, the interrupt execution response time is increased by five clock cycles. This increase comes in addition to the start-up time from the selected sleep mode. This start-up time is the time it will take to start the clock source.

If an interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before the interrupt is served.