Counter Register - Normal Mode

The TCAn.CNTL and TCAn.CNTH register pair represents the 16-bit value, TCAn.CNT. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.

CPU and UPDI write access has priority over internal updates of the register.

Name:
CNT
Offset:
0x20
Reset:
0x00
Access:
-
Bit15141312111098
CNT[15:8]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000
Bit76543210
CNT[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 15:8 – CNT[15:8]: Counter High Byte

Counter High Byte

These bits hold the MSB of the 16-bit counter register.

Bits 7:0 – CNT[7:0]: Counter Low Byte

Counter Low Byte

These bits hold the LSB of the 16-bit counter register.