Output

If ASYNC in TCBn.CTRLB is written to '0' ('1'), the output pin is driven synchronously (asynchronously) to the TCB clock. The CCMPINIT, CCMPEN, and CNTMODE bits in TCBn.CTRLB control how the synchronous output is driven. The different configurations and their impact on the output are listed in the table below.

Table 1. Synchronous Output
CNTMODE Output, CTRLB=’0’, CCMPEN=1 Output, CTRLB=’1’, CCMPEN=1
Single-Shot mode Output high when the counter starts and output low when the counter stops Output high when event arrives and output low when the counter stops
8-bit PWM mode PWM mode output PWM mode output
Modes except single shot and PWM Bit CCMPINIT in TCBn.CTRLB Bit CCMPINIT in TCBn.CTRLB