Register Synchronization Categories

Most of the I/O registers need to be synchronized to the asynchronous TCD core clock domain. This is done in different ways for different register categories:

Command and Enable Control registers
Double-buffered registers
Static registers
Normal I/O and STATUS registers

See Table 1 for categorized registers.

Command and Enable Registers

Because of synchronization between the clock domains, it is only possible to change the Enable bits while the Enable Ready bit (ENRDY) in the Status register (TCDn.STATUS) is '1'.

The Control E register commands (TCDn.CTRLE) are automatically synchronized to the TCD core domain when the TCD is enabled and as long as no synchronization is ongoing already. Check if the Command Ready bit (CCMDRDY) is '1' in TCDn.STATUS to ensure that it is possible to write a new command. TCDn.CTRLE is a strobe register that will clear itself when the command is done.

The Control E register commands are:

Synchronize at the end of the TCD cycle: Synchronizes all double-buffered registers to TCD clock domain at the end of the TCD cycle.
Synchronize: Synchronizes all double-buffered registers to the TCD clock domain when the command is synchronized to the TCD clock domain.
Restart: Restarts the TCD counter.
Software Capture A: Capture the TCD counter value to TCDn.CAPTUREA.
Software Capture B: Capture the TCD counter value to TCDn.CAPTUREB.

Double-Buffered Registers

The double-buffered registers can be updated in normal I/O writes while TCD is enabled and no synchronization between the two clock domains is ongoing. Check that the CMDRDY bit in TCDn.STATUS is '1' to ensure that it is possible to update the double-buffered I/O registers. The values will be synchronized to the TCD core domain when a synchronization command is sent or when TCD is enabled.

Static Registers

The static registers are kept static whenever TCD is enabled. This means that these registers must be configured before enabling TCD. It is not possible to write to these registers as long as TCD is enabled. To see if TCD is enabled, check if ENABLE in TCDn.CTRLA is reading '1'.

Normal I/O and Status Registers

The read-only registers inform about synchronization status and values synchronized from the core domain. The reset of these registers and normal I/O registers are not constrained by any synchronization between the domains.

Table 1. Categorization of Registers
Enable and Command Registers	Double-Buffered Registers	Static Registers	Read-Only Registers	Normal I/O Registers
CTRLA (ENABLE bit)	TCDn.DLYCTRL	TCDn.CTRLA (All bits Except ENABLE bit)	TCDn.STATUS	TCDn.INTCTRL
CTRLE	TCDn.DLYVAL	TCDn.CTRLB	TCDn.CAPTUREA	TCDn.INTFLAGS
	TCDn.DITCTRL	TCDn.CTRLC	TCDn.CAPTUREB
	TCDn.DITVAL	TCDn.CTRLD
	TCDn.DBGCTRL	TCDn.EVCTRLA
	TCDn.CMPASET	TCDn.EVCTRLB
	TCDn.CMPACLR	TCDn.INPUTCTRLA
	TCDn.CMPBSET	TCDn.INPUTCTRLB
	TCDn.CMPBCLR	TCDn.FAULTCTRL