Revision History

• Updated section SmartDesign Actions.
• Updated section SmartDesign Hotkeys.
• Updated section Promote to Top-Level.
• Updated section Modify and Rename.
• Updated section View Memory Map.
• Updated section Instantiate.
• Updated section Find Window.
• Updated section Expand and Fold Instance.

• Updated section SmartDesign Actions.
• Removed figures "Example of Zoom In" and "Example of Zoom Out."
• Updated section Replace Component.
• Updated section Update Component Version.
• Updated screenshots Figure 1, Figure 2, Figure 3, Figure 7, and Figure 8 in the section View Memory Map.
• Added section Flattening Hierarchical Smart Design.
• Updated Table 1 in section Message Types and Corrective Actions section.

• Updated the following tables:
  • SmartDesign Actions
  • SmartDesign Hotkeys
• Added note related to Port/Net/Instance naming rules in the SmartDesign User Actions section.
• Added Copy, Cut, and Paste.
• Added Creating Hierarchical Smart Design.
• Added Manage Synthesis Attributes.
• Added Smart Search and Connect.
• Updated VHDL Construct Support in SmartDesign.

B

04/2021

• Updated View Memory Map by adding information related to Downgrade option in the Preferences window.
• Updated SmartDesign Actions section since Connection Mode icon is removed from the tool.
• Updated Make the Connections by removing Connection Mode details since it has been converted to inbuilt Connection Tool.
• Updated How do I make manual connections? section with information related to the Connection Tool.