RCxSTA
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SPEN | RX9 | SREN | CREN | ADDEN | FERR | OERR | RX9D |
AccessR/W | R/W | R/W | R/W | R/W | RO | R/HC | R/HC |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Serial Port Enable bit
Value | Description |
---|---|
1 |
Serial port enabled |
0 |
Serial port disabled (held in Reset) |
9-Bit Receive Enable bit
Value | Description |
---|---|
1 |
Selects 9-bit reception |
0 |
Selects 8-bit reception |
Single Receive Enable bit
Controls reception. This bit is cleared by hardware when reception is complete
Value | Name | Description |
---|---|---|
1 |
SYNC = 1 AND CSRC = 1 |
Start single receive |
0 |
SYNC = 1 AND CSRC = 1 |
Single receive is complete |
X |
SYNC = 0 OR CSRC = 0 |
Don't care |
Continuous Receive Enable bit
Value | Name | Description |
---|---|---|
1 |
SYNC = 1 |
Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN) |
0 |
SYNC = 1 |
Disables continuous receive |
1 |
SYNC = 0 |
Enables receiver |
0 |
SYNC = 0 |
Disables receiver |
Address Detect Enable bit
Value | Name | Description |
---|---|---|
1 |
SYNC = 0 AND RX9 = 1 |
The receive buffer is loaded and the interrupt occurs only when the ninth received bit is set |
0 |
SYNC = 0 AND RX9 = 1 |
All bytes are received and interrupt always occurs. Ninth bit can be used as parity bit |
X |
RX9 = 0 OR SYNC = 1 |
Don't care |
Framing Error bit
Value | Description |
---|---|
1 |
Unread byte in RCxREG has a framing error |
0 |
Unread byte in RCxREG does not have a framing error |
Overrun Error bit
Value | Description |
---|---|
1 |
Overrun error (can be cleared by clearing either SPEN or CREN bit) |
0 |
No overrun error |
Ninth bit of Received Data
This can be address/data bit or a parity bit which is determined by user firmware.