ADCLK
ADC Clock Selection Register
Name:
ADCLK
Offset:
0xF57
Reset:
Access:
Bit
7
6
5
4
3
2
1
0
ADCS[5:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
Bits 5:0 – ADCS[5:0]: ADC Conversion Clock Select bits
ADC Conversion Clock Select bits
Value
Description
n
ADC Clock frequency = F
OSC
/(2*(n+1))