# Threshold Comparison

At the end of each computation:

• The conversion results are latched and held stable at the end-of-conversion.
• The error (ADERR) is calculated based on a difference calculation which is selected by the ADCALC bits. The value can be one of the following calculations (see Table 1 for more details):
• The first derivative of single measurements
• The CVD result when double-sampling is enabled
• The current result vs. a setpoint
• The current result vs. the filtered/average result
• The first derivative of the filtered/average value
• Filtered/average value vs. a setpoint
• The result of the calculation (ADERR) is compared to the upper and lower thresholds, ADUTH and ADLTH registers, to set the ADUTHR and ADLTHR flag bits. The threshold logic is selected by ADTMD bits. The threshold trigger option can be one of the following:
• Never interrupt
• Error is less than lower threshold
• Error is greater than or equal to lower threshold
• Error is between thresholds (inclusive)
• Error is outside of thresholds
• Error is less than or equal to upper threshold
• Error is greater than upper threshold
• Always interrupt regardless of threshold test results
• If the threshold condition is met, the threshold interrupt flag ADTIF is set.
Note:
1. 1.The threshold tests are signed operations.
2. 2.If ADAOV is set, a threshold interrupt is signaled. It is good practice for threshold interrupt handlers to verify the validity of the threshold by checking ADAOV.
Table 1. ADC Error Calculation Mode
2. 2.When ADPSIS = 0.
3. 3.When ADPSIS = 1.