Target Digital I/O

The J200 and J201 headers provide access to the ATmega328P digital I/O pins.

Table 1. J200 Digital I/O High Byte Header
J200 Pin ATmega328P Pin Function
1 PB0  
2 PB1  
3 PB2 SS, SPI Bus Master Slave select
4 PB3 MOSI, SPI Bus Master Output/Slave Input
5 PB4 MISO, SPI Bus Master Input/Slave Output
6 PB5 SCK, SPI Bus Master Clock Input
7 GND  
8 AREF  
9 PC4 SDA, 2-wire Serial Bus Data Input/Output Line. Shared with ADC4.
10 PC5 SCL, 2-wire Serial Bus Clock Line. Shared with ADC5.
Table 2. J201 Digital I/O High Low Header
J201 Pin ATmega328P Pin Function
1 PD0 RXD (ATmega328P USART Input Pin)
2 PD1 TXD (ATmega328P USART Output Pin)
3 PD2  
4 PD3  
5 PD4  
6 PD5  
7 PD6  
8 PD7