CPU Details

Since the result ready interrupt is enabled in the ADC and the application example may store and transmit ADC results via the USART, the correct Interrupt Service Routine (ISR) may be implemented along with a mechanism to forward data to the USART.

The result ready interrupt routine could be implemented similarly to the snippet below, given that the variables ADC_result and send_flag have been defined.

ISR(ADC0_RESRDY_vect)
{
    /* Store the ADC result and notify the main loop to send the result */
    ADC_result = ADC0.RESL;
    send_flag  = 1;

    /* The Interrupt flag has to be cleared manually */
    ADC0.INTFLAGS = ADC_RESRDY_bm;
}

For simplicity, the example only stores and transmits the eight Least Significant bits of the ADC result.

Transmission of the stored value using a USART driver function generated by Atmel START can then be implemented in the main loop in a similar way as in the snippet below.

/* ADC result has been stored and is ready to be sent */
if (send_flag) {
    USART_0_putc(ADC_result);
    send_flag = 0;
}

The ‘USART_0_putc()’ function simply writes the given eight bits to the USART transmit register.

To enable interrupts globally on the device, the I-bit in the CPU Status Register (SREG) must also be set.