ATmega328PB has one additional USART with start-of-frame detection, which can wake up the MCU from all sleep modes - when a start bit is detected. Two USART modules are available in the ATmega328PB with individual configuration registers, refer Register Description section under the USART module in the ATmega328PB device datasheet for detailed description of these registers. They also have separate TX, RX, and XCK pins. For details on the pin mapping for this peripheral, refer to the I/O Multiplexing section in the ATmega328PB device datasheet.
When a high-to-low transition is detected on RxDn, the internal 8MHz oscillator is powered up and the USART clock is enabled. After start-up the rest of the data frame can be received, provided that the baud rate is slow enough to allow the internal 8MHz oscillator to start up. Start-up time of the internal 8MHz oscillator varies with supply voltage and temperature.
The USART start frame detection works both in asynchronous and synchronous modes. It is enabled by writing the Start Frame Detection Enable bit (SFDEn). If the USART Start- Interrupt Enable (RXSIE) bit is set, the USART Receive Start Interrupt is generated immediately when a start is detected.
When using the feature without the Receive Start Interrupt, the start detection logic activates the internal 8MHz oscillator and the USART clock while the frame is being received only. Other clocks remain stopped until the Receive Complete Interrupt optionally wakes up the MCU.
The maximum baud rate depends on the sleep mode the device is woken up from.