Appendix A: Basic Analog Terminology

To better understand the specifications of the ADC2, it is important to understand some basic terminology that may be used to describe the operation of the ADC or the electrical parameters that govern the module.

Full-Scale Range: The operating voltage range between VREF- and VREF+.

Successive Approximation Register (SAR): Microchip’s PIC16 and PIC18 devices employ the Successive Approximation Register (SAR) type of ADC. This type of ADC converts a continuous analog input into an approximate digital representation using a binary search algorithm. The entire SAR conversion process is performed in hardware, so no additional conversion software is needed.

The SAR ADC uses a sampling capacitor to compare the input voltage to the reference voltage. The sampling capacitor voltage is compared to the output of an internal DAC via an internal comparator, which is connected to a successive approximation register. The successive approximation register begins the binary search by setting its Most Significant bit (MSb) to a ‘1’, which forces the DAC output to be VREF/2. The DAC output is compared to the analog input.

If the analog input is greater than the VREF/2 DAC output, the comparator outputs a logic ‘1’; if the analog input is less than VREF/2, the comparator outputs a logic ‘0’. The comparator output is then compared to the MSb of the successive approximation register. If the comparator output is a ‘1’, the MSb of the SAR remains ‘1’; if the comparator output is ‘0’, the SAR clears the MSb.

This process repeats for each bit until the LSb has been processed. Once the LSb has been processed, the conversion is complete, and the conversion result is transferred to the ADRES register pair.

Voltage Resolution: The minimum change in voltage required to ensure a change in the output code level. The voltage resolution of an ADC is equal to the full-scale voltage range of the ADC divided by the number of possible intervals. The number of possible intervals is determined by 2N, where N is the number of ADC bits.

Digital Resolution: Digital resolution is defined in bits, and determines how many distinct output codes the converter can produce over a range of analog input voltages. Digital resolution is illustrated as 2N, where N is the number of ADC bits. For example, a 12-bit ADC would produce 212, or 4096, possible output codes.

Acquisition Time: The time required for the ADC to capture the input voltage during sampling, also referred to as sampling time. Acquisition time for a Successive Approximation Register (SAR) ADC is the time required to charge the sampling capacitor (CHOLD). Insufficient acquisition times may result in inaccurate conversion results.

Code Width: The distance between two transition points, expressed in LSb or voltage.

Monotonic: Any increase in the analog input voltage produces a greater digital output code value, while a decrease in analog input voltage produces a decreased code value.

Transition Point: The analog input voltage at which the digital output switches from one code to the next.

Offset Error: The difference between the measured first transition point and the ideal first transition point of the ADC transfer function expressed in LSb. Offset error can be corrected by subtracting the offset error from the conversion result. Offset error is calculated using the following equation:

Figure 1. Offset Error Calculation
ERROFFSET=VTRANS0.5LSbLSb

VTRANS - The measured voltage at the first transition point

LSb - The ideal voltage of the first transition point calculated as VREF2N

Where:

N = number of ADC bits

VREF = VREF+ - VREF-

Gain Error: The difference between the ideal full-scale range and the measured full-scale range expressed in percentage of the full-scale range. In other words, gain error is the difference between the slope of the ideal transfer function and the measured transfer function. Gain error can be corrected by multiplying each conversion result by the inverse of the gain error.

After correcting for gain and offset errors, the transfer function is considered normalized, and the corrected conversion results can be used to measure Integral Nonlinearity (INL) and Differential Nonlinearity (DNL) errors. Gain error is calculated using the following equation:

Figure 2. Gain Error Calculation
ERRGAIN=(VREF2LSb)V[(2N2):(2N1)]VTRANSLSb

VTRANS - The measured voltage at the first transition point

V[(2N2):(2N1)] - The measured voltage at the final transition point

LSb = VREF2N

Where:

N = number of ADC bits

VREF = VREF+ - VREF-

Differential Nonlinearity (DNL) Error: The difference between a measured code width and the ideal value of one LSb. In an ideal ADC, when the DNL error is zero, each analog step equals one LSb, where one LSb is equal to the ratio of the reference voltage to the ADC resolution (see equation below). In this case, each transition is equally spaced one LSb apart.

DNL errors are calculated for each transition point, and the largest error is reported as the ADC’s DNL. DNL errors are measured after the transfer function has been normalized. The possible range for DNL error values is ± 1 LSb. If the error is ≤ -1 LSb, there will be missing codes in the transfer function. If the error is zero, each LSb is considered ideal and no missing codes are reported in the transfer function. If the error is greater than zero but less than or equal to +1 LSb, a monotonic transfer function is guaranteed and there are no missing codes.

Figure 3. Differential Nonlinearity (DNL) Error Calculation

ERRDNL=VOC+1VOCVLSbIDEAL1 , where 0 < OC < 2N - 2

VOC+1 - Measured voltage value of the adjacent output code

VOC - Measured voltage value of the current output code

VLSb-IDEAL - Ideal voltage value of one LSb

OC – ADC’s digital output code

LSb = VREF2N (IDEAL LSb value)

Where:

N = number of ADC bits

VREF = VREF+ - VREF-

Integral Nonlinearity (INL) Error: The difference between a measured transition point and the corresponding transition point on the ideal transfer curve with the offset and gain errors already corrected. Offset and gain errors must be normalized before measuring INL errors. INL errors are calculated for each transition point, and the largest error is reported as the ADC’s INL. INL errors are expressed in LSb, and are calculated using the following equation:

Figure 4. Integral Nonlinearity (INL) Error Calculation

ERRINL=VOCVZEROVLSbIDEALOC , where 0 < OC < 2N - 1

VOC - Measured voltage value of the current output code

VZERO - Minimum analog input voltage which corresponds to an all-zero output code

VLSb-IDEAL - Ideal voltage value of one LSb

OC – ADC’s digital output code

LSb = VREF2N (Ideal LSb value)

Where:

N = number of ADC bits

VREF = VREF+ - VREF-

Absolute Error: The maximum deviation between any measured transition point and the corresponding ideal transfer function transition point. The absolute error includes the offset, gain, and INL errors, and defines the overall accuracy of the ADC. Offset and gain errors are not normalized when calculating the absolute error. Absolute error is calculated using the following equation:

Figure 5. Absolute Error Calculation
ERRABS=VOCMEASUREDVOCIDEALVLSbIDEAL

VOC-MEASURED - Measured voltage value of the current output code

VOC-IDEAL - Voltage value of the ideal corresponding output code

VLSb-IDEAL - Ideal voltage value of one LSb