The ADC has the ability to operate in Sleep mode, but requires the ADC to
use the dedicated ADCRC as its clock source. When the ADCRC is selected as the clock
source, ADC hardware waits one additional instruction cycle (TCY) before
starting the conversion. This allows the SLEEP instruction to be
executed, which may reduce system noise during the conversion process.
If the ADC interrupt is enabled (ADIE = 1), the device will wake up from
Sleep immediately following the completed conversion. If the ADC interrupt is disabled
(ADIE = 0), the module is shut off after the conversion completes,
although the ON bit remains set.
If an auto-conversion trigger is invoked during Sleep and the ADCRC is the clock source, the ADC will perform the conversion, set ADIF, and may wake the device from Sleep.
If an auto-conversion trigger is invoked during Sleep and the FOSC is the clock source, the trigger will be recorded, but the conversion will not begin until the device exits Sleep via an interrupt. It is important to note that some trigger sources may have interrupt features built in. If the trigger source’s interrupt is enabled and the trigger source is invoked while in Sleep, internal functions, such as oscillator start-up, may result in a slight time delay and additional system noise, which can directly affect the ADC result. Disabling the trigger source’s interrupt or choosing a different trigger source can prevent the ADC from waking up during a conversion.
The ADC module is not affected by either Idle or Doze modes which are available for use with both FOSC and ADCRC clock sources. Idle or Doze modes may be used instead of Sleep mode to reduce the effects of system noise.