Standard Communication

The main interface to the target processor is via standard communication. It contains the connections to the high voltage (V_PP), V_DD sense lines, and clock and data connections that are required for programming and connecting with the target devices.

The V_PP high-voltage lines can produce a variable voltage that can swing from 0-14V to satisfy the voltage requirements of the specific emulation processor.

The V_DD sense connection draws very little current from the target processor. The actual power comes from the MPLAB PICkit 4 In-Circuit Debugger system, as the V_DD sense line is used as a reference only to track the target voltage.

The clock and data connections are interfaces with the following characteristics:

Clock and data signals are in high-impedance mode (even when no power is applied to the MPLAB PICkit 4 In-Circuit Debugger system).
Clock and data signals are protected from high voltages caused by faulty target systems, or improper connections.
Clock and data signals are protected from high current caused from electrical shorts in faulty target systems.

Table 1. Electrical Logic Table
Logic Inputs	V_IH = V_DD x 0.7V (min.)
Logic Inputs	V_IL = V_DD x 0.3V (max.)
Logic Outputs	V_DD = 5V	V_DD = 3V	V_DD = 2.3V	V_DD = 1.4V
	V_OH = 3.8V min.	V_OH = 2.4V min.	V_OH = 1.9V min.	V_OH = 1.0V min.
	V_OL = 0.55V max.	V_OL = 0.55V max.	V_OL = 0.3V max.	V_OL = 0.1V max.

Figure 1. MPLAB^® PICkit^™ 4 Debugger Connector Pinout