DPLL oscillator configuration structure.
| Type | Name | Description |
|---|---|---|
| enum system_clock_source_dpll_filter | filter |
Filter type of the DPLL module |
| bool | lock_bypass |
Bypass lock signal |
| enum system_clock_source_dpll_lock_time | lock_time |
Lock time-out value of the DPLL module |
| bool | low_power_enable |
Enable low power mode |
| bool | on_demand |
Run On Demand. If this is set the DPLL won't run until requested by a peripheral |
| uint32_t | output_frequency |
Output frequency of the clock |
| enum system_clock_source_dpll_prescaler | prescaler |
DPLL prescaler |
| enum system_clock_source_dpll_reference_clock | reference_clock |
Reference clock source of the DPLL module |
| uint16_t | reference_divider |
Devider of reference clock |
| uint32_t | reference_frequency |
Reference frequency of the clock |
| bool | run_in_standby |
Keep the DPLL enabled in standby sleep mode |
| bool | wake_up_fast |
Wake up fast. If this is set DPLL output clock is enabled after the start-up time |