ADC Stays Active in Sleep Modes for Low Latency Mode and Free Running Mode

If the Low Latency bit (LOWLAT in ADCn.CTRLA) is '1', the ADC stays active when the device enters Power-Down or Standby sleep modes. If the Free-Running bit (FREERUN in ADCn.CTRLF) is '1', the ADC continues to run in Standby sleep mode even if the Run in Standby bit (RUNSTDBY in ADCn.CTRLA) is '0'. In both cases, the interrupts will not trigger when the device enters Power-Down or Standby sleep mode.

Work Around

None.

Affected Silicon Revisions

Rev. A
X
Parent topic: ADC - Analog-to-Digital Converter