While erasing program memory, the CPU operation is suspended and resumes when the operation is complete. Upon completion, the NVMIF bit is set, and an interrupt will occur if the NVMIE bit is also set.
Write latch data is not affected by erase operations, and WREN will remain unchanged.
NVMCON1bits.NVMREGS = 0; // Point to PFM
NVMADR = PFM_ADD; // 14-bit PFM address
NVMCON1bits.FREE = 1; // Specify an erase operation
NVMCON1bits.WREN = 1; // Enable write/erase cycle
INTCONbits.GIE = 0; // Disable interrupts during unlock sequence
//The next three steps are the required unlock sequence
NVMCON2 = 0x55; // First unlock code
NVMCON2 = 0xAA; // Second unlock code
NVMCON1bits.WR = 1; // Initiate write/erase cycle
INTCONbits.GIE = 1; // Enable interrupts
NVMCON1bits.WREN = 1; // Disable writes